The present invention relates to a timing arrangement or circuit and more particularly, to one that can ensure fail-safe operation when it is used in conjunction with a control device such as a relay for actuating or controlling emergency devices, such as brakes on a railroad car.
It has been known to provide so-called "block boundaries" in operating conventional railroad equipment and to arrange for delayed application of emergency devices such as brakes in the event that a train passes a boundary or a block boundary at a predetermined speed. However, such delays are usually very short, being of the order of six or seven seconds. In such cases, a timing circuit involving the use of a capacitor is connected to what is known as a B-relay. Such a relay is well-known in the railroad signaling or communicating arts, being a relay which has nonweldable contacts, will not respond to reverse polarity, and has other characteristics such that it will fail-safe; that is to say, it will produce a safe condition such as applying the brakes to a train in the event that any part of the system fails.
A significant problem, however, presents itself under specifications that call for delaying the safety brake application for more extended time periods; that is, for time periods which vary widely and are as extended as fifty or more seconds. In these cases, the size of capacitors necessary to hold a control device such as the aforenoted B-relay for an extended time of the order of fifty seconds would have to be extremely large such as twenty thousand microfarads. It turns out that the only capacitors of this size that would be useful are electrolytic capacitors; however, electrolytic capacitors would not meet specifications that have recently been imposed whereby tolerances are not to exceed .+-. 10 per cent over a temperature range of -30.degree. F. to +160.degree. F.
Accordingly, it is a primary object of the present invention to provide a fail-safe timing circuit that will satisfy the aforenoted specifications with regard to furnishing the requisite extended time period or delay in the application of emergency devices and also to meet the stringent temperature coefficients and tolerances imposed.
Another major object is to meet reduced tolerance specifications even in those cases where the time delay is not an abnormally long one, that is to say, even in those cases normally encountered under conventional specifications; where standard time delays of approximately six seconds are called for, but the tolerances on the exactitude of timing have been severely lowered such that previously satisfactory prior art arrangements will not fulfil the purpose.
In fulfilment of the above stated objects, it is a broad feature of the present invention that a fail-safe timing circuit is provided which enables the use of a capacitor of small capacitance value for extended time delay applications while satisfying stringent temperature coefficient and tolerance requirements; or in the alternative, permits using a capacitor, normally employed for conventional, short-time delay purposes, in such a way that much more stringent tolerance requirements than normally imposed can be met. In the former case, that is, where a capacitor of small value can be substituted for an extremely large one, the saving in physical size is considerable inasmuch as integrated circuits, which are used with the small capacitor, are made in such small sizes today that they consume very little space in the complete package. In other words, a bonus advantage accrues in physical size reduction, in addition to satisfying temperature coefficient and tolerance requirements.
The fail-safe timing circuit or system of the present invention comprises a variable passive timing element in the form of a capacitor which operates to establish a predetermined delay, coupled with a means for translating that predetermined delay into the extended delay period required before the emergency devices are to be activated.
The preferable means for providing the requisite translation between the predetermined delay furnished by the capacitor and the extended period desired takes the form of an active timing device comprising a plurality of transistors in a circuit, and preferably including a unit known as a 555 timer which operates so as to repeat its timing cycle responsive to, and to the extent of, the charge present on the passive element.
Another basic feature of the present invention includes the provision of a tuned circuit just prior to the utilization device in the form of the aforesaid B-relay. In accordance with this tuned circuit arrangement, only an output signal of a particular frequency will be passed and will be capable of maintaining the relay energized. Any other signal or lack of signal will produce no output current to such relay and hence the relay will become de-energized. Thus, a fail-safe operation for the relay is insured in the event that the prescribed frequency, within .+-.10 per cent, is not being received at the output of the timing circuit of the present invention.
Other and further objects, advantages and features of the present invention will be understood by reference to the following specification in conjunction with the annexed drawings, wherein like parts have been given like numbers.